Struct necsim_core::simulation::Simulation  
source · #[repr(C)]pub struct Simulation<M: MathsCore, H: Habitat<M>, G: RngCore<M>, S: LineageStore<M, H>, X: EmigrationExit<M, H, G, S>, D: DispersalSampler<M, H, G>, C: CoalescenceSampler<M, H, S>, T: TurnoverRate<M, H>, N: SpeciationProbability<M, H>, E: EventSampler<M, H, G, S, X, D, C, T, N>, I: ImmigrationEntry<M>, A: ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>> { /* private fields */ }Implementations§
source§impl<M: MathsCore, H: Habitat<M>, G: RngCore<M>, S: LineageStore<M, H>, X: EmigrationExit<M, H, G, S>, D: DispersalSampler<M, H, G>, C: CoalescenceSampler<M, H, S>, T: TurnoverRate<M, H>, N: SpeciationProbability<M, H>, E: EventSampler<M, H, G, S, X, D, C, T, N>, I: ImmigrationEntry<M>, A: ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>> Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
 
impl<M: MathsCore, H: Habitat<M>, G: RngCore<M>, S: LineageStore<M, H>, X: EmigrationExit<M, H, G, S>, D: DispersalSampler<M, H, G>, C: CoalescenceSampler<M, H, S>, T: TurnoverRate<M, H>, N: SpeciationProbability<M, H>, E: EventSampler<M, H, G, S, X, D, C, T, N>, I: ImmigrationEntry<M>, A: ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>> Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
pub fn with_mut_split_active_lineage_sampler_and_rng_and_migration_balance<Q, F: FnOnce(&mut A, &mut PartialSimulation<M, H, G, S, X, D, C, T, N, E>, &mut G, &mut Wrapping<u64>) -> Q>( &mut self, func: F ) -> Q
pub fn with_mut_split_event_sampler_and_rng<Q, F: FnOnce(&mut E, &PartialSimulation<M, H, G, S, X, D, C, T, N>, &mut G) -> Q>( &mut self, func: F ) -> Q
pub fn rng_mut(&mut self) -> &mut G
pub fn active_lineage_sampler(&self) -> &A
pub fn active_lineage_sampler_mut(&mut self) -> &mut A
pub fn lineage_store(&self) -> &S
pub fn lineage_store_mut(&mut self) -> &mut S
pub fn event_sampler(&self) -> &E
pub fn event_sampler_mut(&mut self) -> &mut E
pub fn speciation_probability(&self) -> &N
pub fn turnover_rate(&self) -> &T
pub fn habitat(&self) -> &H
pub fn dispersal_sampler(&self) -> &D
pub fn coalescence_sampler(&self) -> &C
pub fn emigration_exit(&self) -> &X
pub fn emigration_exit_mut(&mut self) -> &mut X
pub fn immigration_entry_mut(&mut self) -> &mut I
pub fn migration_portals_mut(&mut self) -> (&mut X, &mut I)
source§impl<M: MathsCore, H: Habitat<M>, G: RngCore<M>, S: LineageStore<M, H>, X: EmigrationExit<M, H, G, S>, D: DispersalSampler<M, H, G>, C: CoalescenceSampler<M, H, S>, T: TurnoverRate<M, H>, N: SpeciationProbability<M, H>, E: EventSampler<M, H, G, S, X, D, C, T, N>, I: ImmigrationEntry<M>, A: ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>> Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
 
impl<M: MathsCore, H: Habitat<M>, G: RngCore<M>, S: LineageStore<M, H>, X: EmigrationExit<M, H, G, S>, D: DispersalSampler<M, H, G>, C: CoalescenceSampler<M, H, S>, T: TurnoverRate<M, H>, N: SpeciationProbability<M, H>, E: EventSampler<M, H, G, S, X, D, C, T, N>, I: ImmigrationEntry<M>, A: ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>> Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
pub fn is_done(&self) -> bool
pub fn get_balanced_remaining_work(&self) -> Wrapping<u64>
pub fn simulate_incremental_early_stop<F: FnMut(&Self, u64, PositiveF64, &P) -> ControlFlow<(), ()>, P: Reporter>( &mut self, early_stop: F, reporter: &mut P ) -> (NonNegativeF64, u64)
pub fn simulate<P: Reporter>(self, reporter: &mut P) -> (NonNegativeF64, u64)
Trait Implementations§
source§impl<M: MathsCore, H: Habitat<M>, G: RngCore<M>, S: LineageStore<M, H>, X: EmigrationExit<M, H, G, S>, D: DispersalSampler<M, H, G>, C: CoalescenceSampler<M, H, S>, T: TurnoverRate<M, H>, N: SpeciationProbability<M, H>, E: EventSampler<M, H, G, S, X, D, C, T, N>, I: ImmigrationEntry<M>, A: ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>> Backup for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
 
impl<M: MathsCore, H: Habitat<M>, G: RngCore<M>, S: LineageStore<M, H>, X: EmigrationExit<M, H, G, S>, D: DispersalSampler<M, H, G>, C: CoalescenceSampler<M, H, S>, T: TurnoverRate<M, H>, N: SpeciationProbability<M, H>, E: EventSampler<M, H, G, S, X, D, C, T, N>, I: ImmigrationEntry<M>, A: ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>> Backup for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
source§impl<M, H, G, S, X, D, C, T, N, E, I, A> ComputeTypeSet for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>where
    M: ComputeTypeSet + MathsCore,
    H: ComputeTypeSet + Habitat<M>,
    G: ComputeTypeSet + RngCore<M>,
    S: ComputeTypeSet + LineageStore<M, H>,
    X: ComputeTypeSet + EmigrationExit<M, H, G, S>,
    D: ComputeTypeSet + DispersalSampler<M, H, G>,
    C: ComputeTypeSet + CoalescenceSampler<M, H, S>,
    T: ComputeTypeSet + TurnoverRate<M, H>,
    N: ComputeTypeSet + SpeciationProbability<M, H>,
    E: ComputeTypeSet + EventSampler<M, H, G, S, X, D, C, T, N>,
    I: ComputeTypeSet + ImmigrationEntry<M>,
    A: ComputeTypeSet + ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>,
 
impl<M, H, G, S, X, D, C, T, N, E, I, A> ComputeTypeSet for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>where
    M: ComputeTypeSet + MathsCore,
    H: ComputeTypeSet + Habitat<M>,
    G: ComputeTypeSet + RngCore<M>,
    S: ComputeTypeSet + LineageStore<M, H>,
    X: ComputeTypeSet + EmigrationExit<M, H, G, S>,
    D: ComputeTypeSet + DispersalSampler<M, H, G>,
    C: ComputeTypeSet + CoalescenceSampler<M, H, S>,
    T: ComputeTypeSet + TurnoverRate<M, H>,
    N: ComputeTypeSet + SpeciationProbability<M, H>,
    E: ComputeTypeSet + EventSampler<M, H, G, S, X, D, C, T, N>,
    I: ComputeTypeSet + ImmigrationEntry<M>,
    A: ComputeTypeSet + ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>,
§type Output<__TypeSetRest: ExpandTypeSet> = <<<<<<<<<<<<<__TypeSetRest as ComputeSet>::Output<Wrapping<u64>> as ComputeSet>::Output<I> as ComputeSet>::Output<G> as ComputeSet>::Output<A> as ComputeSet>::Output<E> as ComputeSet>::Output<X> as ComputeSet>::Output<N> as ComputeSet>::Output<T> as ComputeSet>::Output<C> as ComputeSet>::Output<D> as ComputeSet>::Output<S> as ComputeSet>::Output<H> as ComputeSet>::Output<PhantomData<M>>
 
type Output<__TypeSetRest: ExpandTypeSet> = <<<<<<<<<<<<<__TypeSetRest as ComputeSet>::Output<Wrapping<u64>> as ComputeSet>::Output<I> as ComputeSet>::Output<G> as ComputeSet>::Output<A> as ComputeSet>::Output<E> as ComputeSet>::Output<X> as ComputeSet>::Output<N> as ComputeSet>::Output<T> as ComputeSet>::Output<C> as ComputeSet>::Output<D> as ComputeSet>::Output<S> as ComputeSet>::Output<H> as ComputeSet>::Output<PhantomData<M>>
Extend the set 
T into a (larger) set containing also the types this
type links to. Read moresource§impl<M: Debug + MathsCore, H: Debug + Habitat<M>, G: Debug + RngCore<M>, S: Debug + LineageStore<M, H>, X: Debug + EmigrationExit<M, H, G, S>, D: Debug + DispersalSampler<M, H, G>, C: Debug + CoalescenceSampler<M, H, S>, T: Debug + TurnoverRate<M, H>, N: Debug + SpeciationProbability<M, H>, E: Debug + EventSampler<M, H, G, S, X, D, C, T, N>, I: Debug + ImmigrationEntry<M>, A: Debug + ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>> Debug for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
 
impl<M: Debug + MathsCore, H: Debug + Habitat<M>, G: Debug + RngCore<M>, S: Debug + LineageStore<M, H>, X: Debug + EmigrationExit<M, H, G, S>, D: Debug + DispersalSampler<M, H, G>, C: Debug + CoalescenceSampler<M, H, S>, T: Debug + TurnoverRate<M, H>, N: Debug + SpeciationProbability<M, H>, E: Debug + EventSampler<M, H, G, S, X, D, C, T, N>, I: Debug + ImmigrationEntry<M>, A: Debug + ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>> Debug for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
source§impl<M: MathsCore, H, G, S, X, D, C, T, N, E, I, A> RustToCuda for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>where
    A: RustToCuda + ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>,
    H: RustToCuda + Habitat<M>,
    G: RustToCuda + RngCore<M>,
    S: RustToCuda + LineageStore<M, H>,
    X: RustToCuda + EmigrationExit<M, H, G, S>,
    D: RustToCuda + DispersalSampler<M, H, G>,
    C: RustToCuda + CoalescenceSampler<M, H, S>,
    T: RustToCuda + TurnoverRate<M, H>,
    N: RustToCuda + SpeciationProbability<M, H>,
    E: RustToCuda + EventSampler<M, H, G, S, X, D, C, T, N>,
    I: RustToCuda + ImmigrationEntry<M>,
 
impl<M: MathsCore, H, G, S, X, D, C, T, N, E, I, A> RustToCuda for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>where
    A: RustToCuda + ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>,
    H: RustToCuda + Habitat<M>,
    G: RustToCuda + RngCore<M>,
    S: RustToCuda + LineageStore<M, H>,
    X: RustToCuda + EmigrationExit<M, H, G, S>,
    D: RustToCuda + DispersalSampler<M, H, G>,
    C: RustToCuda + CoalescenceSampler<M, H, S>,
    T: RustToCuda + TurnoverRate<M, H>,
    N: RustToCuda + SpeciationProbability<M, H>,
    E: RustToCuda + EventSampler<M, H, G, S, X, D, C, T, N>,
    I: RustToCuda + ImmigrationEntry<M>,
type CudaRepresentation = SimulationCudaRepresentation<M, H, G, S, X, D, C, T, N, E, I, A>
type CudaAllocation = CombinedCudaAlloc<<I as RustToCuda>::CudaAllocation, CombinedCudaAlloc<<G as RustToCuda>::CudaAllocation, CombinedCudaAlloc<<A as RustToCuda>::CudaAllocation, CombinedCudaAlloc<<E as RustToCuda>::CudaAllocation, CombinedCudaAlloc<<X as RustToCuda>::CudaAllocation, CombinedCudaAlloc<<N as RustToCuda>::CudaAllocation, CombinedCudaAlloc<<T as RustToCuda>::CudaAllocation, CombinedCudaAlloc<<C as RustToCuda>::CudaAllocation, CombinedCudaAlloc<<D as RustToCuda>::CudaAllocation, CombinedCudaAlloc<<S as RustToCuda>::CudaAllocation, CombinedCudaAlloc<<H as RustToCuda>::CudaAllocation, NoCudaAlloc>>>>>>>>>>>
source§impl<M: MathsCore, H, G, S, X, D, C, T, N, E, I, A> RustToCudaAsync for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>where
    A: RustToCudaAsync + ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>,
    H: RustToCudaAsync + Habitat<M>,
    G: RustToCudaAsync + RngCore<M>,
    S: RustToCudaAsync + LineageStore<M, H>,
    X: RustToCudaAsync + EmigrationExit<M, H, G, S>,
    D: RustToCudaAsync + DispersalSampler<M, H, G>,
    C: RustToCudaAsync + CoalescenceSampler<M, H, S>,
    T: RustToCudaAsync + TurnoverRate<M, H>,
    N: RustToCudaAsync + SpeciationProbability<M, H>,
    E: RustToCudaAsync + EventSampler<M, H, G, S, X, D, C, T, N>,
    I: RustToCudaAsync + ImmigrationEntry<M>,
 
impl<M: MathsCore, H, G, S, X, D, C, T, N, E, I, A> RustToCudaAsync for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>where
    A: RustToCudaAsync + ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>,
    H: RustToCudaAsync + Habitat<M>,
    G: RustToCudaAsync + RngCore<M>,
    S: RustToCudaAsync + LineageStore<M, H>,
    X: RustToCudaAsync + EmigrationExit<M, H, G, S>,
    D: RustToCudaAsync + DispersalSampler<M, H, G>,
    C: RustToCudaAsync + CoalescenceSampler<M, H, S>,
    T: RustToCudaAsync + TurnoverRate<M, H>,
    N: RustToCudaAsync + SpeciationProbability<M, H>,
    E: RustToCudaAsync + EventSampler<M, H, G, S, X, D, C, T, N>,
    I: RustToCudaAsync + ImmigrationEntry<M>,
type CudaAllocationAsync = CombinedCudaAlloc<<I as RustToCudaAsync>::CudaAllocationAsync, CombinedCudaAlloc<<G as RustToCudaAsync>::CudaAllocationAsync, CombinedCudaAlloc<<A as RustToCudaAsync>::CudaAllocationAsync, CombinedCudaAlloc<<E as RustToCudaAsync>::CudaAllocationAsync, CombinedCudaAlloc<<X as RustToCudaAsync>::CudaAllocationAsync, CombinedCudaAlloc<<N as RustToCudaAsync>::CudaAllocationAsync, CombinedCudaAlloc<<T as RustToCudaAsync>::CudaAllocationAsync, CombinedCudaAlloc<<C as RustToCudaAsync>::CudaAllocationAsync, CombinedCudaAlloc<<D as RustToCudaAsync>::CudaAllocationAsync, CombinedCudaAlloc<<S as RustToCudaAsync>::CudaAllocationAsync, CombinedCudaAlloc<<H as RustToCudaAsync>::CudaAllocationAsync, NoCudaAlloc>>>>>>>>>>>
source§impl<M, H, G, S, X, D, C, T, N, E, I, A> TypeLayout for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>where
    M: TypeLayout + MathsCore,
    H: TypeLayout + Habitat<M>,
    G: TypeLayout + RngCore<M>,
    S: TypeLayout + LineageStore<M, H>,
    X: TypeLayout + EmigrationExit<M, H, G, S>,
    D: TypeLayout + DispersalSampler<M, H, G>,
    C: TypeLayout + CoalescenceSampler<M, H, S>,
    T: TypeLayout + TurnoverRate<M, H>,
    N: TypeLayout + SpeciationProbability<M, H>,
    E: TypeLayout + EventSampler<M, H, G, S, X, D, C, T, N>,
    I: TypeLayout + ImmigrationEntry<M>,
    A: TypeLayout + ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>,
 
impl<M, H, G, S, X, D, C, T, N, E, I, A> TypeLayout for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>where
    M: TypeLayout + MathsCore,
    H: TypeLayout + Habitat<M>,
    G: TypeLayout + RngCore<M>,
    S: TypeLayout + LineageStore<M, H>,
    X: TypeLayout + EmigrationExit<M, H, G, S>,
    D: TypeLayout + DispersalSampler<M, H, G>,
    C: TypeLayout + CoalescenceSampler<M, H, S>,
    T: TypeLayout + TurnoverRate<M, H>,
    N: TypeLayout + SpeciationProbability<M, H>,
    E: TypeLayout + EventSampler<M, H, G, S, X, D, C, T, N>,
    I: TypeLayout + ImmigrationEntry<M>,
    A: TypeLayout + ActiveLineageSampler<M, H, G, S, X, D, C, T, N, E, I>,
§type Inhabited = <And<<PhantomData<M> as TypeLayout>::Inhabited, <And<<H as TypeLayout>::Inhabited, <And<<S as TypeLayout>::Inhabited, <And<<D as TypeLayout>::Inhabited, <And<<C as TypeLayout>::Inhabited, <And<<T as TypeLayout>::Inhabited, <And<<N as TypeLayout>::Inhabited, <And<<X as TypeLayout>::Inhabited, <And<<E as TypeLayout>::Inhabited, <And<<A as TypeLayout>::Inhabited, <And<<G as TypeLayout>::Inhabited, <And<<I as TypeLayout>::Inhabited, <And<<Wrapping<u64> as TypeLayout>::Inhabited, Inhabited> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output
 
type Inhabited = <And<<PhantomData<M> as TypeLayout>::Inhabited, <And<<H as TypeLayout>::Inhabited, <And<<S as TypeLayout>::Inhabited, <And<<D as TypeLayout>::Inhabited, <And<<C as TypeLayout>::Inhabited, <And<<T as TypeLayout>::Inhabited, <And<<N as TypeLayout>::Inhabited, <And<<X as TypeLayout>::Inhabited, <And<<E as TypeLayout>::Inhabited, <And<<A as TypeLayout>::Inhabited, <And<<G as TypeLayout>::Inhabited, <And<<I as TypeLayout>::Inhabited, <And<<Wrapping<u64> as TypeLayout>::Inhabited, Inhabited> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output> as ComputeInhabited>::Output
Marker type for whether the type is
inhabited or
uninhabited.
The associated type must be either [
inhabited::Inhabited]
or [inhabited::Uninhabited].source§const TYPE_LAYOUT: TypeLayoutInfo<'static> = _
 
const TYPE_LAYOUT: TypeLayoutInfo<'static> = _
Shallow layout of the type.
Auto Trait Implementations§
impl<M, H, G, S, X, D, C, T, N, E, I, A> Freeze for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
impl<M, H, G, S, X, D, C, T, N, E, I, A> RefUnwindSafe for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>where
    H: RefUnwindSafe,
    S: RefUnwindSafe,
    D: RefUnwindSafe,
    C: RefUnwindSafe,
    T: RefUnwindSafe,
    N: RefUnwindSafe,
    X: RefUnwindSafe,
    E: RefUnwindSafe,
    A: RefUnwindSafe,
    G: RefUnwindSafe,
    I: RefUnwindSafe,
    M: RefUnwindSafe,
impl<M, H, G, S, X, D, C, T, N, E, I, A> Send for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
impl<M, H, G, S, X, D, C, T, N, E, I, A> Sync for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
impl<M, H, G, S, X, D, C, T, N, E, I, A> Unpin for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>
impl<M, H, G, S, X, D, C, T, N, E, I, A> UnwindSafe for Simulation<M, H, G, S, X, D, C, T, N, E, I, A>where
    H: UnwindSafe,
    S: UnwindSafe,
    D: UnwindSafe,
    C: UnwindSafe,
    T: UnwindSafe,
    N: UnwindSafe,
    X: UnwindSafe,
    E: UnwindSafe,
    A: UnwindSafe,
    G: UnwindSafe,
    I: UnwindSafe,
    M: UnwindSafe,
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
    T: ?Sized,
 
impl<T> BorrowMut<T> for Twhere
    T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
 
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more
§impl<T> ExtractDiscriminant for T
 
impl<T> ExtractDiscriminant for T
§type Discriminant = <T as ExtractDiscriminantSpec<<T as DiscriminantKind>::Discriminant>>::Ty
 
type Discriminant = <T as ExtractDiscriminantSpec<<T as DiscriminantKind>::Discriminant>>::Ty
The type of the discriminant, which must satisfy the trait bounds
required by 
core::mem::Discriminant. Read moresource§impl<T> LendToCuda for Twhere
    T: RustToCuda,
 
impl<T> LendToCuda for Twhere
    T: RustToCuda,
source§fn lend_to_cuda<O, E, F>(&self, inner: F) -> Result<O, E>where
    E: From<CudaError>,
    F: FnOnce(HostAndDeviceConstRef<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>) -> Result<O, E>,
    T: Sync,
 
fn lend_to_cuda<O, E, F>(&self, inner: F) -> Result<O, E>where
    E: From<CudaError>,
    F: FnOnce(HostAndDeviceConstRef<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>) -> Result<O, E>,
    T: Sync,
Lends an immutable borrow of 
&self to CUDA: Read moresource§fn lend_to_cuda_mut<O, E, F>(&mut self, inner: F) -> Result<O, E>where
    E: From<CudaError>,
    F: FnOnce(HostAndDeviceMutRef<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>) -> Result<O, E>,
    T: Sync + SafeMutableAliasing,
 
fn lend_to_cuda_mut<O, E, F>(&mut self, inner: F) -> Result<O, E>where
    E: From<CudaError>,
    F: FnOnce(HostAndDeviceMutRef<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>) -> Result<O, E>,
    T: Sync + SafeMutableAliasing,
source§fn move_to_cuda<O, E, F>(self, inner: F) -> Result<O, E>where
    E: From<CudaError>,
    F: FnOnce(HostAndDeviceOwned<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>) -> Result<O, E>,
    T: Send + RustToCuda,
    <T as RustToCuda>::CudaRepresentation: StackOnly,
    <T as RustToCuda>::CudaAllocation: EmptyCudaAlloc,
 
fn move_to_cuda<O, E, F>(self, inner: F) -> Result<O, E>where
    E: From<CudaError>,
    F: FnOnce(HostAndDeviceOwned<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>) -> Result<O, E>,
    T: Send + RustToCuda,
    <T as RustToCuda>::CudaRepresentation: StackOnly,
    <T as RustToCuda>::CudaAllocation: EmptyCudaAlloc,
source§impl<T> LendToCudaAsync for Twhere
    T: RustToCudaAsync,
 
impl<T> LendToCudaAsync for Twhere
    T: RustToCudaAsync,
source§fn lend_to_cuda_async<'stream, O, E, F>(
    &self,
    stream: Stream<'stream>,
    inner: F
) -> Result<O, E>where
    E: From<CudaError>,
    F: FnOnce(Async<'_, 'stream, HostAndDeviceConstRef<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>>) -> Result<O, E>,
    T: Sync,
 
fn lend_to_cuda_async<'stream, O, E, F>(
    &self,
    stream: Stream<'stream>,
    inner: F
) -> Result<O, E>where
    E: From<CudaError>,
    F: FnOnce(Async<'_, 'stream, HostAndDeviceConstRef<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>>) -> Result<O, E>,
    T: Sync,
Lends an immutable copy of 
&self to CUDA: Read moresource§fn lend_to_cuda_mut_async<'a, 'stream, O, E, F, S>(
    this: OwningRefMut<'a, Box<S>, T>,
    stream: Stream<'stream>,
    inner: F
) -> Result<(Async<'a, 'stream, OwningRefMut<'a, Box<S>, T>, Box<dyn FnOnce(&mut T) -> Result<(), CudaError> + 'a>>, O), E>where
    E: From<CudaError>,
    F: for<'b> FnOnce(Async<'b, 'stream, HostAndDeviceMutRef<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>>) -> Result<O, E>,
    S: 'a,
    T: Sync + SafeMutableAliasing,
 
fn lend_to_cuda_mut_async<'a, 'stream, O, E, F, S>(
    this: OwningRefMut<'a, Box<S>, T>,
    stream: Stream<'stream>,
    inner: F
) -> Result<(Async<'a, 'stream, OwningRefMut<'a, Box<S>, T>, Box<dyn FnOnce(&mut T) -> Result<(), CudaError> + 'a>>, O), E>where
    E: From<CudaError>,
    F: for<'b> FnOnce(Async<'b, 'stream, HostAndDeviceMutRef<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>>) -> Result<O, E>,
    S: 'a,
    T: Sync + SafeMutableAliasing,
source§fn move_to_cuda_async<'stream, O, E, F>(
    self,
    stream: Stream<'stream>,
    inner: F
) -> Result<O, E>where
    E: From<CudaError>,
    F: for<'a> FnOnce(Async<'a, 'stream, HostAndDeviceOwned<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>>) -> Result<O, E>,
    T: Send + RustToCuda,
    <T as RustToCuda>::CudaRepresentation: StackOnly,
    <T as RustToCuda>::CudaAllocation: EmptyCudaAlloc,
 
fn move_to_cuda_async<'stream, O, E, F>(
    self,
    stream: Stream<'stream>,
    inner: F
) -> Result<O, E>where
    E: From<CudaError>,
    F: for<'a> FnOnce(Async<'a, 'stream, HostAndDeviceOwned<'_, DeviceAccessible<<T as RustToCuda>::CudaRepresentation>>>) -> Result<O, E>,
    T: Send + RustToCuda,
    <T as RustToCuda>::CudaRepresentation: StackOnly,
    <T as RustToCuda>::CudaAllocation: EmptyCudaAlloc,
§impl<T> TypeGraphLayout for Twhere
    T: TypeLayout + ComputeTypeSet,
 
impl<T> TypeGraphLayout for Twhere
    T: TypeLayout + ComputeTypeSet,
§const TYPE_GRAPH: TypeLayoutGraph<'static> = _
 
const TYPE_GRAPH: TypeLayoutGraph<'static> = _
Shallow layout of the type.